Circuits, boards and bench

The whole board flow: schematic, footprints, routing, 3D view, gerbers a fab will accept. No seat cost and no feature gate.

Start with

kicad   # then File > New Project

The gotcha

Start from a verified footprint, not a drawn one. A footprint that is 0.5mm wrong is a board you cannot populate, and you will not see it on screen.

SPICE for analog and mixed-signal. Operating point, transient, AC sweep, noise, Monte Carlo over component tolerance.

Start with

ngspice circuit.cir

The gotcha

A malformed element line is skipped with a warning and the run still exits 0, so you can simulate a circuit you did not write. Check the warnings before you trust a waveform. Convergence failures, when you do get them, are usually a model problem rather than a circuit problem.

Hierarchical schematic capture that netlists to SPICE, Verilog or VHDL. The front end for analog work on an open PDK.

Start with

xschem

The gotcha

It is a netlist editor, not a drawing tool. Symbols and pins have to match the models exactly or the netlist is silently wrong.

Drives cheap FX2 logic analyzers and most modern SCPI scopes, with protocol decoders for I2C, SPI, UART, CAN and more.

Start with

pulseview

The gotcha

Sample fast enough to catch the edge you care about, not just the bit. Undersampling turns a timing bug into a mystery.

Nothing to install. Build a circuit, watch the timing diagram, share a link to it. The lowest-friction way to get somebody from gates to a working adder in an afternoon.

Start with

# open circuitverse.org and start a new circuit

The gotcha

Browser convenience costs you scale. Past a few hundred elements, move to something local.

Drag gates onto a canvas and watch the signals move. The fastest way to understand a circuit before writing a line of Verilog.

Start with

# needs Java 21+; download the release jar and run it

The gotcha

It teaches the structure, not the timing. Nothing here prepares you for setup and hold.

Built for teaching, exports to Verilog and VHDL, and runs on real FPGA boards. The bridge between a drawing and an implementation.

Start with

# download the release jar and run it

The gotcha

The exported HDL is a starting point. Read it before you trust it, which is a useful exercise in itself.