Projects
Open source worth reading, not just installing.
The toolkit covers what I run. This is different: projects worth cloning because of what you learn on the way through them. Every one is free, actively maintained, and has taught me something I did not get from documentation. Where I know the trap, I have said what it is.
How to use this
Pick one and change something in it.
Reading a repository teaches you less than breaking one. Every entry below has a line saying where to start, and in most cases that is a specific file rather than the README, because the README tells you what the authors meant and the code tells you what they did.
These are ordered roughly by how much you need to know first. If you have never drawn a logic gate, the browser is a perfectly respectable place to begin.
- Cost
- Nothing. All of it is openly licensed.
- Hardware needed
- None until the FPGA work, then an iCE40 or ECP5 board
- Sponsorship
- None. Nobody paid to be on this list
- Links
- Checked before publishing, and again on every build
Start here
Lists other people maintain, so you can see the whole landscape before picking a corner of it.
- drom/awesome-hdl Hardware description languages, compared rather than just listed Most lists enumerate. This one puts the languages and simulators next to each other so you can see what each is actually for.
- aolofsson/awesome-opensource-hardware Tools, generators and reusable designs Maintained by someone who builds open silicon tooling, so the entries are judged rather than collected.
- ben-marshall/awesome-open-hardware-verification Verification tools and frameworks Narrower than the others and more useful, because verification is the thinnest part of the open toolchain and the part that decides whether a design works.
Learn by building
Clone it, run it, change something and see what breaks. This is the fastest way in.
- CircuitVerse Digital logic in a browser, nothing to install Gates to a working adder in an afternoon, with a timing diagram and a shareable link. The lowest-friction entry point that exists.
- hneemann/Digital Logic simulator built for teaching that exports Verilog and VHDL The bridge between a drawing and an implementation. You design visually, then read the HDL it produces and start to see the correspondence.
- projf/projf-explore Working FPGA designs in Verilog, MIT licensed Framebuffers, sprites, Pong, maths cores, targeting iCE40, ECP5 and Xilinx 7-series, with fifty-plus written posts alongside. The best hands-on Verilog repository I know of.
Read something real
Production designs written by people who had to ship them. Reading good RTL teaches things no tutorial does.
- lowRISC/ibex A production 32-bit RISC-V core in SystemVerilog Multiple tapeouts and documented properly. The core is interesting; the verification setup around it is the part worth your time, because almost nothing else open shows you how a real core is proven.
Take it to silicon
The route from a Verilog file to a part you can hold, with nothing licensed along the way.
- librelane/librelane RTL to GDSII, the FOSSi Foundation successor to OpenLane 2 The orchestrator that drives OpenROAD, Yosys, Magic and the rest through a full implementation flow against an open PDK.
- TinyTapeout/ttsky-verilog-template The submission template for a real shuttle Fork it, drop Verilog in src/, edit info.yaml, adapt the testbench, and a GitHub Action builds the ASIC files. This is the actual path to a fabricated chip, for about the price of a textbook.